ARM architecture

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The Acorn RISC Machine (or ARM) is a RISC CPU design that is widely used in a number of low-power applications. In general it is considered to be a very "pure" RISC implementation, which tends to keep it small and inexpensive.

The ARM was started as a project at Acorn Ltd. after being refused access to the upcoming Intel 80286. The result was a RISC CPU of tiny size, the first production ARM2 had only 30,000 transistors (compare with the 68000's 68000).

The ARM processors consume very little power for what they can do. Architecturally, the instruction set is interesting because every instruction can be made conditional. This cuts down significantly on the space available for, for example, displacements in memory access instructions, but on the other hand it does make it possible to avoid branch instructions when generating code for small if statements. The standard example of this is Euclid's GCD algorithm:

int
gcd(int i, int j)
{
   while (i != j) {
      if (i > j)
          i -= j;
      else
          j -= i;
   }
   return i;
} 

Expressed in ARM assembly, the loop, with a little rotation, might look something like

       b      test
loop   subgt  Ri,Ri,Rj
       suble  Rj,Rj,Ri
test   cmp    Ri,Rj
       bne    loop

which avoids the branches around the then and else clause that one would typically have to emit.

Another unique feature of the instruction set is the ability to fold shifts and rotates into the "data processing" (arithmetic, logical, and register-register move) instructions, so that, for example, the C statement "a += (j << 2);" could be rendered as a single instruction on the ARM, register allocation permitting. The ARM processor also has some features rarely seen on other architectures that are considered RISC, such as PC-relative addressing (indeed, on the ARM the PC is one of its 16 registers) and pre- and post-increment addressing modes.

Perhaps in part because of the conditional execution facility using up four bits of every instruction, recent ARM processors have a 16-bit instruction mode, called THUMB. This is intended to allow smaller code where possible.

Another item of note is that the ARM has been around for a while, with the instruction set increasing somewhat over time. Some ARM processors, for example, have no instruction to load a two-byte quantity, so that, strictly speaking, for them it's not possible to generate code that would behave the way one would expect for C objects of type "volatile short".